Le 14/08/2016 à 16:27, Aneesh Kumar K.V a écrit :
Christophe Leroy <christophe.le...@c-s.fr> writes:
This set provides implementation of huge pages on the 8xx
Christophe Leroy (6):
powerpc: port 64 bits pgtable_cache to 32 bits
powerpc: fix usage of _PAGE_RO in hugepage
powerpc/8xx: use r3 to scratch CR in ITLBmiss
powerpc/8xx: Move additional DTLBMiss handlers out of exception area
powerpc/8xx: make user addr DTLB miss the short path
powerpc/8xx: implementation of huge pages
Patch 2,3,4,5 are not really related to hugepage implementation right ?
May be that can be sent as a separate series ?
Patch 2 is a lack in gup_hugepte: on 8xx, _PAGE_RW (hence _PAGE_WRITE)
is defined as 0 and _PAGE_RO must be set when the page in not writeable.
So that's a prerequisite to implementation of huge page
Patch 3, 4, 5 are prerequisits for the implementation of huge page
handling in the TLB miss handlers:
* 3: for huge pages implementation we need to branch base of value of
bit 28 and 29 of the PGD entry. For this we need to preserve CR.
* 4: With the instructions related to hugepages, there is not enough
space anymore in the TLB Exception areas, so part of the it has to be
moved away.
* 5: That one might be seen as not directly related to hugepages, but it
requires patch 3.
Maybe I should reorder into 3, 4, 5, 2, 1, 6 ?
Christophe
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