On 8/30/16 00:48, Vineet Gupta wrote: > On 08/29/2016 06:03 AM, Arnd Bergmann wrote: >> On Sunday 28 August 2016, cheng...@emindsoft.com.cn wrote: >>> From: Chen Gang <cheng...@emindsoft.com.cn> >>> >>> Also use the same changing to asm-generic, and also use bool variable >>> instead of int variable for mips, mn10300, parisc and tile related >>> functions, and also avoid checkpatch.pl to report ERROR. >>> >>> Originally, except powerpc and xtensa, all another architectures intend >>> to return 0 or 1. After this patch, also let powerpc and xtensa return 0 >>> or 1. >>> >>> The patch passes cross building for mips and parisc with default config. >>> All related contents are found by "grep test_bit, grep test_and" under >>> arch sub-directory. >>> >>> Signed-off-by: Chen Gang <gang.chen.5...@gmail.com> >> >> This seems like a good idea overall, and I'm fine with the asm-generic >> contents. If there is consensus on changing this, we probably also want >> to do some other steps: >> >> - Change the Documentation/atomic_ops.txt file accordingly >> - split up the series per architecture (I don't think there are any >> interdependencies) >> - For the architectures on which the definition changes (at least >> x86 and ARM), do some more sanity checks and see if there are >> noticeable changes in object code, and if so whether it looks >> better or worse (I'm guessing it will be better if anything) > > For ARC atleast, it will be slightly worse. As bool is promoted to int in > various > expressions, gcc generates an additional EXTB (extend byte) instruction. >
Could you provide the related proof? Or shall I try to analyze about it and get proof? Thanks. -- Chen Gang (陈刚) Managing Natural Environments is the Duty of Human Beings.
