Hi Peter
On Thu, Sep 1, 2016 at 5:39 AM, Ji-Ze Hong (Peter Hong) <hpe...@gmail.com> wrote: > > switch (pdata->pid) { > + case CHIP_ID_F81865: > case CHIP_ID_F81866: > - sio_write_mask_reg(pdata, F81866_FIFO_CTRL, F81866_IRQ_MODE1, > - 0); > + if (pdata->pid == CHIP_ID_F81866) > + sio_write_mask_reg(pdata, F81866_FIFO_CTRL, > + F81866_IRQ_MODE1, 0); > + > sio_write_mask_reg(pdata, F81866_IRQ_MODE, F81866_IRQ_SHARE, > F81866_IRQ_SHARE); > sio_write_mask_reg(pdata, F81866_IRQ_MODE, What about: case CHIP_ID_F81866: sio_write_mask_reg(pdata, F81866_FIFO_CTRL, F81866_IRQ_MODE1, 0); /* fall through */ case CHIP_ID_F81865: sio_write_mask_reg(pdata, F81 ..... > @@ -312,6 +318,7 @@ static void fintek_8250_set_rs485_handler(struct > uart_8250_port *uart) > default: /* No RS485 Auto direction functional */ > break; > > + case CHIP_ID_F81865: > case CHIP_ID_F81866: > case CHIP_ID_F81216AD: > case CHIP_ID_F81216H: > -- > 1.9.1 > -- Ricardo Ribalda