When expanding the la or dla pseudo-instruction in a delay slot the GNU
assembler will complain should the pseudo-instruction expand to multiple
actual instructions, since only the first of them will be in the delay
slot leading to the pseudo-instruction being only partially executed if
the branch is taken. Use of PTR_LA in the dec int-handler.S leads to
such warnings:
arch/mips/dec/int-handler.S: Assembler messages:
arch/mips/dec/int-handler.S:149: Warning: macro instruction expanded into
multiple instructions in a branch delay slot
arch/mips/dec/int-handler.S:198: Warning: macro instruction expanded into
multiple instructions in a branch delay slot
Avoid this by placing nops in the delay slots of the affected branches,
leading to the PTR_LA macros being placed after the branches & their
delay slots. Although the nop isn't strictly needed, it's an
insignificant cost & satisfies the assembler easily with more
readable code than the possible alternative of manually expanding the
la/dla pseudo-instructions & placing the appropriate first instruction
into the delay slots.
Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---
arch/mips/dec/int-handler.S | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index d7b9918..54ddca1 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -137,16 +137,16 @@
and t0,t1 # isolate allowed ones
beqz t0,spurious
-
#ifdef CONFIG_32BIT
and t2,t0
bnez t2,fpu # handle FPU immediately
#endif
+ nop
/*
* Find irq with highest priority
*/
- PTR_LA t1,cpu_mask_nr_tbl
+ PTR_LA t1,cpu_mask_nr_tbl
1: lw t2,(t1)
nop
and t2,t0
@@ -191,11 +191,12 @@
1: and t0,t1 # mask out allowed ones
beqz t0,spurious
+ nop
/*
* Find irq with highest priority
*/
- PTR_LA t1,asic_mask_nr_tbl
+ PTR_LA t1,asic_mask_nr_tbl
2: lw t2,(t1)
nop
and t2,t0
--
2.9.3
