On Thu, 8 Sep 2016, Fenghua Yu wrote:
> + cpuid_count(0x00000010, 1, &eax, &ebx, &ecx, &edx);
> + c->x86_l3_max_closid = edx + 1;
> + c->x86_l3_max_cbm_len = eax + 1;
According to the SDM:
EAX Bits 4:0: Length of the capacity bit mask for the corresponding ResID.
Bits 31:05: Reserved
EDX Bits 15:0: Highest COS number supported for this ResID.
Bits 31:16: Reserved
So why are we assuming that bits 31-5 of EAX and 16-31 of EDX are going to
be zero forever and if not that they are just extending the existing bits?
If that's the case then we don't need to mask out the upper bits, but the
code wants a proper comment about this.
Thanks,
tglx
