If the FTM counter reaches the FTM_MOD value between the reading of the TOF bit and the writing of 0 to the TOF bit, the process of clearing the TOF bit does not work as expected when FTMx_CONF[NUMTOF] != 0 and the current TOF count is less than FTMx_CONF[NUMTOF]. If the above condition is met, the TOF bit remains set. If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1), the TOF interrupt also remains asserted.
Above is the errata discription The workaround is clearing TOF bit until it is cleaned(FTM counter doesn't always reache the FTM_MOD anyway),which may cost some cycles. Signed-off-by: Meng Yi <meng...@nxp.com> --- Change from V1: -add timeout into wile loop using a counter --- drivers/clocksource/fsl_ftm_timer.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/fsl_ftm_timer.c b/drivers/clocksource/fsl_ftm_timer.c index 738515b..97bdb09 100644 --- a/drivers/clocksource/fsl_ftm_timer.c +++ b/drivers/clocksource/fsl_ftm_timer.c @@ -83,11 +83,11 @@ static inline void ftm_counter_disable(void __iomem *base) static inline void ftm_irq_acknowledge(void __iomem *base) { - u32 val; + u32 count = 100; - val = ftm_readl(base + FTM_SC); - val &= ~FTM_SC_TOF; - ftm_writel(val, base + FTM_SC); + while ((FTM_SC_TOF & ftm_readl(base + FTM_SC)) && count--) + ftm_writel(ftm_readl(base + FTM_SC) & (~FTM_SC_TOF), + base + FTM_SC); } static inline void ftm_irq_enable(void __iomem *base) -- 2.1.0.27.g96db324