2016-09-30 14:59 GMT+02:00 Peter Ujfalusi <peter.ujfal...@ti.com>: > On 09/29/16 19:31, Bartosz Golaszewski wrote: >> Default memory settings of da850 do not meet the throughput/latency >> requirements of tilcdc. This results in the image displayed being >> incorrect and the following warning being displayed by the LCDC >> drm driver: >> >> tilcdc da8xx_lcdc.0: tilcdc_crtc_irq(0x00000020): FIFO underfow >> >> Reconfigure the LCDC priority to the highest. This is a workaround >> for the da850-lcdk board which has the LCD controller enabled in >> the device tree, but a long-term, system-wide fix is needed for >> all davinci boards. >> >> This patch has been modified for mainline linux. It comes from a >> downstream TI release for da850[1]. >> >> Original author: Vishwanathrao Badarkhe, Manish <manish...@ti.com> >>
[snip] > > Is this safe to do for all da850 boards (to change PR_OLD_COUNT from 0xff to > 0x20)? Most probably it is, but this setting has nothing to do with LCDC. > > The whole priority configuration has nothing to do with the LCDC, it is a > system level priority. > > Now you have lowered the eDMA3_0-TPTC0/1 priority. Audio is serviced by > eDMA3_0-TPTC1. So are we going to see issues in audio if LCDC is taking the > highest priority? > Just ran a quick test with speaker-test -c2 -twav. Besides the fact that the left and right channels are inverted (I'm looking into that), I didn't notice any problems. Even at 1024x768 resolution, playing audio at the same time seems to work fine. Best regards, Bartosz Golaszewski
