On Thu, Oct 13, 2016 at 05:52:30PM +0300, Noam Camus wrote: > From: Noam Camus <noa...@mellanox.com> > > Till now we used clockevent from generic ARC driver. > This was enough as long as we worked with simple multicore SoC. > When we are working with multithread SoC each HW thread can be > scheduled to receive timer interrupt using timer mask register > (TSI1). > > This patch will provide a way to control clock events per > HW thread. > > Driver can be used from device tree by: > compatible = "ezchip,nps400-timer0" <-- for clocksource > compatible = "ezchip,nps400-timer1" <-- for clockevent
You're letting Linux details define the binding. Are these blocks different (the block itself, not connections to the block like interrupts)? If you need a particular timer instance to be used, then describe whatever is the difference in the h/w. For example, the clockevent timer has to be the timer with an interrupt. Rob
