Add HWCAP2 for x86 and reserve its 1st bit to expose Xeon Phi ring 3 monitor/mwait to userspace apps.
Signed-off-by: Grzegorz Andrejczuk <grzegorz.andrejc...@intel.com> --- arch/x86/include/asm/elf.h | 9 +++++++++ arch/x86/include/uapi/asm/hwcap2.h | 7 +++++++ arch/x86/kernel/cpu/common.c | 3 +++ 3 files changed, 19 insertions(+) create mode 100644 arch/x86/include/uapi/asm/hwcap2.h diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h index e7f155c..59703aa 100644 --- a/arch/x86/include/asm/elf.h +++ b/arch/x86/include/asm/elf.h @@ -258,6 +258,15 @@ extern int force_personality32; #define ELF_HWCAP (boot_cpu_data.x86_capability[CPUID_1_EDX]) +extern unsigned int elf_hwcap2; + +/* + * HWCAP2 supplies mask with kernel enabled CPU features, so that + * the application can discover that it can safely use them. + * The bits are defined in uapi/asm/hwcap2.h. + */ +#define ELF_HWCAP2 elf_hwcap2 + /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in intent than poking at uname or /proc/cpuinfo. diff --git a/arch/x86/include/uapi/asm/hwcap2.h b/arch/x86/include/uapi/asm/hwcap2.h new file mode 100644 index 0000000..90ef445 --- /dev/null +++ b/arch/x86/include/uapi/asm/hwcap2.h @@ -0,0 +1,7 @@ +#ifndef _ASM_HWCAP2_H +#define _ASM_HWCAP2_H + +/* Kernel enabled Ring 3 MWAIT for Xeon Phi*/ +#define HWCAP2_PHIR3MWAIT (1 << 0) + +#endif diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index bcc9ccc..fdbf708 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -35,6 +35,7 @@ #include <asm/desc.h> #include <asm/fpu/internal.h> #include <asm/mtrr.h> +#include <asm/hwcap2.h> #include <linux/numa.h> #include <asm/asm.h> #include <asm/bugs.h> @@ -51,6 +52,8 @@ #include "cpu.h" +unsigned int elf_hwcap2 __read_mostly; + /* all of these masks are initialized in setup_cpu_local_masks() */ cpumask_var_t cpu_initialized_mask; cpumask_var_t cpu_callout_mask; -- 2.5.1