On 09/29, Rajendra Nayak wrote: > Some alpha PLLs have support for only a 16bit programable Alpha Value > (as against the default 40bits). Add a flag to handle the 16bit alpha > registers > > Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> > ---
Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
