* Janakarajan Natarajan <janakarajan.natara...@amd.com> wrote: > This patch enables perf core PMU support for AMD family17h processors. In > family17h, there is no PMC-event constraint. All events, irrespective of the > type, can be measured using any of the performance counters.
BTW., that's a very nice hardware design that simplifies counter constraints
and
scheduling!
Does Fam17h have 6 generic counters per core, like Fam15h?
Thanks,
Ingo
