On 12/07/2016 12:05 AM, Cyrille Pitchen wrote: > Le 06/12/2016 à 20:01, Marek Vasut a écrit : >> On 12/06/2016 05:01 PM, Cyrille Pitchen wrote: >>> The patch checks whether the Quad Enable bit is already set in the Status >>> Register. If so, the function exits immediately with a successful return >>> code. >> >> Performance optimization I presume ? > > Performance optimization is one benefit but this real purpose of the > patch is to avoid writing over and over a non-volatile bit at each boot, > actually each time spi_nor_scan() is called. > > To be honest, I don't know whether internally the SPI memory is clever > enough not to perform the actual write when it sees the bit value has > not changed. I wanted to improve the memory lifetime by avoiding the > update of the bit from software just to be sure :)
Well the bit is in some sort of internal SRAM or silicon register , no? > Anyway, thanks for your review! np >> Acked-by: Marek Vasut <[email protected]> >> >>> Signed-off-by: Cyrille Pitchen <[email protected]> >>> Reviewed-by: Jagan Teki <[email protected]> >>> --- >>> drivers/mtd/spi-nor/spi-nor.c | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >>> index da7cd69d4857..1fd32b991eb7 100644 >>> --- a/drivers/mtd/spi-nor/spi-nor.c >>> +++ b/drivers/mtd/spi-nor/spi-nor.c >>> @@ -1216,6 +1216,9 @@ static int macronix_quad_enable(struct spi_nor *nor) >>> val = read_sr(nor); >>> if (val < 0) >>> return val; >>> + if (val & SR_QUAD_EN_MX) >>> + return 0; >>> + >>> write_enable(nor); >>> >>> write_sr(nor, val | SR_QUAD_EN_MX); >>> >> >> > -- Best regards, Marek Vasut
