Hi Arnaldo, Can you please review 2nd and 3rd patch.
-Ravi On Monday 05 December 2016 09:26 PM, Ravi Bangoria wrote: > For jump instructions that does not include target address as direct > operand, show the original disassembled line for them. This is needed > for certain powerpc jump instructions that use target address in a > register (such as bctr, btar, ...). > > Before: > ld r12,32088(r12) > mtctr r12 > v bctr ffffffffffffca2c > std r2,24(r1) > addis r12,r2,-1 > > After: > ld r12,32088(r12) > mtctr r12 > v bctr > std r2,24(r1) > addis r12,r2,-1 > > Suggested-by: Michael Ellerman <m...@ellerman.id.au> > Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com> > --- > Changes in v8: > - v7: https://lkml.org/lkml/2016/9/21/436 > - Rebase to acme/perf/core > - No logical changes. (Cross arch annotate patches are in. This patch > is for hardening annotate for powerpc.) > > tools/perf/util/annotate.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c > index 4012b1d..ea7e0de 100644 > --- a/tools/perf/util/annotate.c > +++ b/tools/perf/util/annotate.c > @@ -237,6 +237,9 @@ static int jump__parse(struct arch *arch __maybe_unused, > struct ins_operands *op > static int jump__scnprintf(struct ins *ins, char *bf, size_t size, > struct ins_operands *ops) > { > + if (!ops->target.addr) > + return ins__raw_scnprintf(ins, bf, size, ops); > + > return scnprintf(bf, size, "%-6.6s %" PRIx64, ins->name, > ops->target.offset); > } >