Kyle Moffett a écrit :
Prefetching is also fairly critical on a Power4 or G5 PowerPC system as
they have a long memory latency; an L2-cache miss can cost 200+ cycles.
On such systems the "dcbt" prefetch instruction brings in a single
128-byte cacheline and has no serializing effects whatsoever, making it
ideal for use in a linked-list-traversal inner loop.
OK, 200 cycles...
But what is the cost of the conditional branch you added in prefetch(x) ?
if (!x) return;
(correctly predicted or not, but do powerPC have a BTB ?)
About the NULL 'potential problem', maybe we could use a dummy nil (but
mapped) object, and use its address in lists, ie compare for &nil instead of
NULL. This would avoid :
- The conditional test in some prefetch() implementations
- The potential TLB problem with the NULL value.
-
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