On Tue, Dec 27, 2016 at 05:13:04PM +0800, Minghuan Lian wrote: > A MSI controller of LS1043a v1.0 only includes one MSIR and > is assigned one GIC interrupt. In order to support affinity, > LS1043a v1.1 MSI is assigned 4 MSIRs and 4 GIC interrupts. > But the MSIR has the different offset and only supports 8 MSIs. > The bits between variable bit_start and bit_end in structure > ls_scfg_msir are used to show 8 MSI interrupts. msir_irqs and > msir_base are added to describe the difference of MSI between > LS1043a v1.1 and other SoCs. > > Signed-off-by: Minghuan Lian <minghuan.l...@nxp.com> > --- > .../interrupt-controller/fsl,ls-scfg-msi.txt | 1 + > drivers/irqchip/irq-ls-scfg-msi.c | 45 > +++++++++++++++++++--- > 2 files changed, 40 insertions(+), 6 deletions(-)
Acked-by: Rob Herring <r...@kernel.org>
