The DryIce block on i.MX25 chipset uses two interrupts: A normal and a
security violation interrupt. Add the security violation interrupt to
the list, it is optional.
Signed-off-by: Martin Kaiser <mar...@kaiser.cx>
---
arch/arm/boot/dts/imx25.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 831d09a..331d1e1 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -560,7 +560,7 @@
reg = <0x53ffc000 0x4000>;
clocks = <&clks 81>;
clock-names = "ipg";
- interrupts = <25>;
+ interrupts = <25 56>;
};
};
--
1.7.10.4
