On Tue, 17 Jan 2017, Borislav Petkov wrote: > From: Borislav Petkov <[email protected]> > > This was meant to save us the scanning of the microcode containter in > the initrd since the first AP had already done that but it can also hurt > us: > > Imagine a single hyperthreaded CPU (Intel(R) Atom(TM) CPU N270 for > example) which updates the microcode on the BSP but since the microcode > engine is shared between the two threads, the update on CPU1 doesn't > happen because it has already happened on CPU0 and we don't find a newer > microcode revision. > > Which doesn't set the intel_ucode_patch pointer and at initrd > jettisoning time and we don't save the microcode patch for later > application. > > Now, when we suspend to RAM, the loaded microcode gets cleared so we > need to reload but there's no patch saved in the cache. > > Removing this optimization fixes this issue and all is fine and dandy. > > Signed-off-by: Borislav Petkov <[email protected]>
So this one needs to go into x86/urgent Reviewed-by: Thomas Gleixner <[email protected]>
