On Thu, Jan 19, 2017 at 05:13:12PM -0500, Vivien Didelot wrote:
> Hi Gregory,
>
> Gregory CLEMENT <[email protected]> writes:
>
> > From: Romain Perier <[email protected]>
> >
> > Some Marvell ethernet switches have internal ethernet transceivers with
> > hardcoded phy addresses. These addresses can be greater than the number
> > of ports or its value might be different than the associated port number.
> > This is for example the case for MV88E6341 that has 6 ports and internal
> > Port 1 to Port4 PHYs mapped at SMI addresses from 0x11 to 0x14.
>
> Isn't there an hardware table used to map the PHY addresses on such chip?
The 6390 has something like this. But if we can avoid it, lets keep it
KISS.
Andrew
