Patch adds support for detection of thread IMC events. It adds a new domain IMC_DOMAIN_THREAD and it is determined with the help of the compatibility string "ibm,imc-counters-thread" based on the IMC device tree.
Cc: Madhavan Srinivasan <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Anton Blanchard <[email protected]> Cc: Sukadev Bhattiprolu <[email protected]> Cc: Michael Neuling <[email protected]> Cc: Stewart Smith <[email protected]> Cc: Daniel Axtens <[email protected]> Cc: Stephane Eranian <[email protected]> Cc: Balbir Singh <[email protected]> Cc: Anju T Sudhakar <[email protected]> Signed-off-by: Hemant Kumar <[email protected]> --- arch/powerpc/include/asm/imc-pmu.h | 2 ++ arch/powerpc/perf/imc-pmu.c | 1 + arch/powerpc/platforms/powernv/opal-imc.c | 11 +++++++++-- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/imc-pmu.h b/arch/powerpc/include/asm/imc-pmu.h index 5e76cd0..f2b4f12 100644 --- a/arch/powerpc/include/asm/imc-pmu.h +++ b/arch/powerpc/include/asm/imc-pmu.h @@ -32,6 +32,7 @@ #define IMC_DTB_COMPAT "ibm,opal-in-memory-counters" #define IMC_DTB_NEST_COMPAT "ibm,imc-counters-nest" #define IMC_DTB_CORE_COMPAT "ibm,imc-counters-core" +#define IMC_DTB_THREAD_COMPAT "ibm,imc-counters-thread" /* * Structure to hold per chip specific memory address @@ -70,6 +71,7 @@ struct imc_pmu { */ #define IMC_DOMAIN_NEST 1 #define IMC_DOMAIN_CORE 2 +#define IMC_DOMAIN_THREAD 3 #define UNKNOWN_DOMAIN -1 diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c index 61d99c7..a48c5be 100644 --- a/arch/powerpc/perf/imc-pmu.c +++ b/arch/powerpc/perf/imc-pmu.c @@ -26,6 +26,7 @@ struct imc_pmu *core_imc_pmu; /* Needed for sanity check */ extern u64 nest_max_offset; extern u64 core_max_offset; +extern u64 thread_max_offset; PMU_FORMAT_ATTR(event, "config:0-20"); static struct attribute *imc_format_attrs[] = { diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c index 6db3c5f..a5565e7 100644 --- a/arch/powerpc/platforms/powernv/opal-imc.c +++ b/arch/powerpc/platforms/powernv/opal-imc.c @@ -39,6 +39,7 @@ extern int init_imc_pmu(struct imc_events *events, int idx, struct imc_pmu *pmu_ptr); u64 nest_max_offset; u64 core_max_offset; +u64 thread_max_offset; static int imc_event_info(char *name, struct imc_events *events) { @@ -86,6 +87,10 @@ static void update_max_value(u32 value, int pmu_domain) if (core_max_offset < value) core_max_offset = value; break; + case IMC_DOMAIN_THREAD: + if (thread_max_offset < value) + thread_max_offset = value; + break; default: /* Unknown domain, return */ return; @@ -239,6 +244,8 @@ int imc_get_domain(struct device_node *pmu_dev) return IMC_DOMAIN_NEST; if (of_device_is_compatible(pmu_dev, IMC_DTB_CORE_COMPAT)) return IMC_DOMAIN_CORE; + if (of_device_is_compatible(pmu_dev, IMC_DTB_THREAD_COMPAT)) + return IMC_DOMAIN_THREAD; else return UNKNOWN_DOMAIN; } @@ -277,7 +284,7 @@ static void imc_free_events(struct imc_events *events, int nr_entries) /* * imc_pmu_create : Takes the parent device which is the pmu unit and a * pmu_index as the inputs. - * Allocates memory for the pmu, sets up its domain (NEST or CORE), and + * Allocates memory for the pmu, sets up its domain (NEST/CORE/THREAD), and * allocates memory for the events supported by this pmu. Assigns a name for * the pmu. Calls imc_events_node_parser() to setup the individual events. * If everything goes fine, it calls, init_imc_pmu() to setup the pmu device @@ -305,7 +312,7 @@ static int imc_pmu_create(struct device_node *parent, int pmu_index) if (pmu_ptr->domain == UNKNOWN_DOMAIN) goto free_pmu; - /* Needed for hotplug/migration */ + /* Needed for hotplug/migration for nest and core IMC PMUs */ if (pmu_ptr->domain == IMC_DOMAIN_CORE) core_imc_pmu = pmu_ptr; else if (pmu_ptr->domain == IMC_DOMAIN_NEST) -- 2.7.4
