> -----Original Message----- > From: Jerry Huang > Sent: Friday, February 10, 2017 11:30 PM > To: 'Felipe Balbi' <ba...@kernel.org>; robh...@kernel.org; > mark.rutl...@arm.com; catalin.mari...@arm.com > Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; > devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Rajesh > Bhagat <rajesh.bha...@nxp.com> > Subject: RE: [PATCH v4 3/3] USB3/DWC3: Enable undefined length INCR burst > type > > > >> -- > > >> 1.7.9.5 > > > Hi, Balbi and all guys, > > > Any comment for these patches? Can they be accepted? > > > > Rob had comments which you didn't reply yet. I cannot take this > > patchset yet ;-) > > > Balbi, > I look into his mail again, which was based v3, and I replied it. > He had different understanding for undefined length burst mode. > It seems he think for this mode, just setting bit[0] (INCRBrstEna) and don't > need to set other field. > However, according to the DWC USB3.0 controller databook, when it is > undefined length INCR burst mode, we still need to set one max burst type, > such as INCR8, which means controller will use any length less than or equal > to this INCR8. Any comment for it? Ten days passed away again :)