Add pwm controller bindings for sam5d2_xplained
and enable it.
Changes since v1:
- Correct the typo in patch subject.
Signed-off-by: Claudiu Beznea <claudiu.bez...@microchip.com>
---
arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi | 4 ++++
arch/arm/boot/dts/sama5d2.dtsi | 8 ++++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
b/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
index 9fc270f..493ea29 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained_common.dtsi
@@ -318,6 +318,10 @@
};
};
+ pwm0: pwm@f802c000 {
+ status = "okay";
+ };
+
flx0: flexcom@f8034000 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "disabled"; /* conflict with ISC_D2 &
ISC_D3 data pins */
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index cd459e8..e88785e 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1098,6 +1098,14 @@
status = "disabled";
};
+ pwm0: pwm@f802c000 {
+ compatible = "atmel,sama5d2-pwm";
+ reg = <0xf802c000 0x4000>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
+ #pwm-cells = <3>;
+ clocks = <&pwm_clk>;
+ };
+
sfr: sfr@f8030000 {
compatible = "atmel,sama5d2-sfr", "syscon";
reg = <0xf8030000 0x98>;
--
2.7.4
