From: Thierry Reding <thierry.red...@gmail.com> Date: Fri, 10 Mar 2017 17:34:52 +0100
> This series of patches start with a few cleanups that I ran across while > adding Tegra186 support to the stmmac driver. It then adds code for FIFO > size parsing from feature registers and finally enables support for the > incarnation of the Synopsys DWC QOS IP found on NVIDIA Tegra186 SoCs. > > This is based on next-20170310. > > Changes in v2: > - address review comments by Mikko and Joao > - add two additional cleanup patches Series applied, thank you.
