Mike Frysinger <[EMAIL PROTECTED]> wrote: > > [*] The FRV, for example, does have some limited protection capability - but > > it is really limited and not really useful in this case. > > how so ?
There are a limited set of protection registers (At least 8 insn and 8 data) that can permit tiles of protection that are a power-of-2 megabytes in size. However, these also have to be used to grant the kernel access to h/w (including RAM). Note that it's not possible to shift windows around in response to faults because fault reporting is asynchronous - the entire remaining instruction queue will be executed *before* the exception is actually raised to the kernel. > the Blackfin processor lacks a MMU but it does have a MPU (memory protection > unit) which allows granularity down to 1k page sizes ... so for future > releases, we plan on integrating optional support for this so that you could > have processes protected from each other and the kernel protected from all > the processes ... so in our case, we might actually be able to support > revoking of maps because we would have that region of memory ear marked as > unaccessible ... That sounds reasonable. However, I suspect that most NOMMU CPUs won't be able to do that. In effect you're creating a third option, I think (MMU, NOMMU, MPU). > note that the Blackfin processor manuals confusingly call this aspect > of the chip an "MMU" ... dont be fooled ! Same for FRV. It is memory management - it just doesn't include virtual memory mapping. David - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/