On 12-04-17, 18:05, Sudeep Holla wrote:
> 
> 
> On 20/03/17 09:32, Viresh Kumar wrote:
> [...]
> 
> > +
> > +Example 7: domain-Performance-state:
> > +(example: For 1GHz require domain state 1 and for 1.1 & 1.2 GHz require 
> > state 2)
> > +
> > +/ {
> > +   domain_opp_table: opp_table0 {
> > +           compatible = "operating-points-v2";
> > +
> > +           opp@1 {
> > +                   domain-performance-state = <1>;
> > +                   opp-microvolt = <975000 970000 985000>;
> > +           };
> > +           opp@2 {
> > +                   domain-performance-state = <2>;
> > +                   opp-microvolt = <1075000 1000000 1085000>;
> > +           };
> > +   };
> > +
> > +   foo_domain: power-controller@12340000 {
> > +           compatible = "foo,power-controller";
> > +           reg = <0x12340000 0x1000>;
> > +           #power-domain-cells = <0>;
> > +           operating-points-v2 = <&domain_opp_table>;
> > +   }
> > +
> > +   cpu0_opp_table: opp_table1 {
> > +           compatible = "operating-points-v2";
> > +           opp-shared;
> > +
> > +           opp@1000000000 {
> > +                   opp-hz = /bits/ 64 <1000000000>;
> > +                   domain-performance-state = <1>;
> > +           };
> > +           opp@1100000000 {
> > +                   opp-hz = /bits/ 64 <1100000000>;
> > +                   domain-performance-state = <2>;
> > +           };
> > +           opp@1200000000 {
> > +                   opp-hz = /bits/ 64 <1200000000>;
> > +                   domain-performance-state = <2>;
> > +           };
> > +   };
> > +
> > +   cpus {
> > +           #address-cells = <1>;
> > +           #size-cells = <0>;
> > +
> > +           cpu@0 {
> > +                   compatible = "arm,cortex-a9";
> > +                   reg = <0>;
> > +                   clocks = <&clk_controller 0>;
> > +                   clock-names = "cpu";
> > +                   operating-points-v2 = <&cpu0_opp_table>;
> > +                   power-domains = <&foo_domain>;
> > +           };
> > +   };
> > +};
> 
> 
> Thinking more about this above example, I think you need more
> explanation. So in the above case you have cpu with clock controller,
> power-domain and the OPP table info, I can think of few things that need
> to be explicit:
> 
> 1. How does the precedence look like ?

Just think of the power-domain as a regulator here. If we are
increasing frequency of the device, power-domain needs to be
programmed first followed by the clock.

> 2. Since power-domains with OPP table control the performance state, do

They control performance state of the domains, not the devices.

>    we ignore clock and operating-points-v2 in the above case completely?

No. They are separate.

> 
> 3. Will the power-domain drive the OPP ?

power-domain will driver its own state using its own OPP table.
Devices may fine tune within those states.

-- 
viresh

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