[PATCH 4/8] ARM: dts: imx7s: Add node for GPC

[Andrey Smirnov]

Add node for GPC and specify as a parent interrupt controller for SoC bus.

Cc: yurov...@gmail.com
Cc: Sascha Hauer <ker...@pengutronix.de>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: Rob Herring <robh...@kernel.org>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Russell King <li...@armlinux.org.uk>
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com>
---
 arch/arm/boot/dts/imx7s.dtsi | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 8fee299..1a7058f 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -42,6 +42,7 @@
  */
 
 #include <dt-bindings/clock/imx7d-clock.h>
+#include <dt-bindings/power/imx7-power.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -119,7 +120,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
-               interrupt-parent = <&intc>;
+               interrupt-parent = <&gpc>;
                ranges;
 
                funnel@30041000 {
@@ -301,6 +302,7 @@
                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 
IRQ_TYPE_LEVEL_HIGH)>;
                        #interrupt-cells = <3>;
                        interrupt-controller;
+                       interrupt-parent = <&intc>;
                        reg = <0x31001000 0x1000>,
                              <0x31002000 0x2000>,
                              <0x31004000 0x2000>,
@@ -309,6 +311,7 @@
 
                timer {
                        compatible = "arm,armv7-timer";
+                       interrupt-parent = <&intc>;
                        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 
IRQ_TYPE_LEVEL_LOW)>,
                                     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | 
IRQ_TYPE_LEVEL_LOW)>,
                                     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | 
IRQ_TYPE_LEVEL_LOW)>,
@@ -564,6 +567,28 @@
                                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                                #reset-cells = <1>;
                        };
+
+                       gpc: gpc@303a0000 {
+                               compatible = "fsl,imx7d-gpc";
+                               reg = <0x303a0000 0x10000>;
+                               interrupt-controller;
+                               interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                               #interrupt-cells = <3>;
+                               interrupt-parent = <&intc>;
+                               #power-domain-cells = <1>;
+
+                               pgc {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       pgc_pcie_phy: pgc-pcie-phy-domain {
+                                               #power-domain-cells = <0>;
+
+                                               reg = 
<IMX7_POWER_DOMAIN_PCIE_PHY>;
+                                               power-supply = <&reg_1p0d>;
+                                       };
+                               };
+                       };
                };
 
                aips2: aips-bus@30400000 {
-- 
2.9.3