On Tue, Apr 25, 2017 at 02:16:55PM +0200, Denys Vlasenko wrote:
> However, all IBS registers are in this range.
I knew you were gonna say that. But IBS registers are architectural too
in the sense that they are behind a CPUID bit.
> DRi_ADDR_MASK are in this range - and these are very useful, likely to
> stay.
Those are too behind a CPUID bit.
> In the arch/x86/include/asm/msr-index.h file we already have
> three "tweak" MSRs defined with "AMD64":
>
> #define MSR_AMD64_LS_CFG 0xc0011020
> #define MSR_AMD64_DC_CFG 0xc0011022
> #define MSR_AMD64_BU_CFG2 0xc001102a
>
> I just noticed that we have a fourth one in
> arch/x86/kernel/cpu/amd.c:
>
> #define MSR_AMD64_DE_CFG 0xC0011029
That's wrong. I think we should call those something else but not
"AMD64". Perhaps the families for which the workaround is being applied.
In the last case, MSR_F12H_DE_CFG, for example. And yes, I should've
paid attention to that but ...
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
