On Wed, 2017-05-03 at 17:59 +0200, Marek Vasut wrote: > On 05/03/2017 04:58 PM, Leonard Crestez wrote: > > On Wed, 2017-05-03 at 16:26 +0200, Marek Vasut wrote: > > > 2) It actually fixes a problem with the voltage rails such that the DVFS > > > works without leaving the system in unstable or dead state. You do > > > need the second part of my patch if you drop the OPP hackery, without > > > it the power framework cannot correctly configure the core voltages, > > > so the patch from Leonard makes things worse. > > No, I think there is a misunderstanding here. The second part of your > > patch will cause cpufreq poking at LDOs to indirectly adjust the input > > from the PMIC to the minimum required (this is LDO target + > > min_dropout_uv). Without it by default VDD_ARM_SOC_IN will remain fixed > > as 1375mV from boot.
> Who sets / guarantees that default value for ARM and SOC rails ? I think it's from the PMIC hardware itself (but maybe uboot plays with it). VDD_ARM_SOC_IN on this board is tied to SW1AB from MMPF0200: http://www.nxp.com/assets/documents/data/en/data-sheets/MMPF0200.pdf It seems reasonable to rely on such voltages set externally. > With the OPP override in place, there's at least the guarantee that both > rails will have the same voltage requirement. If you remove the OPP > override without modeling the actual regulator wiring, the guarantee is > gone. The imx6sx chip has internal LDO_ARM and LDO_SOC regulators which can generate separate voltages for arm/soc. The fact that these regulators share the same supply is only an issue when they are set in bypass mode. However the boot issues happen on REV C but apparently not REV B of the board. I don't have a good explanation for this so maybe I am missing something. -- Regards, Leonard