On 04/18/17 12:07, Mikulas Patocka wrote:
>
> However, on AMD K6-3 CPU, the processor initialization code never calls
> pat_init() and so __pat_enabled stays 1 and the function pat_enabled()
> returns true, even though the K6-3 CPU doesn't support PAT.
>
OK, now I'm wondering: are you actually *using* said K6-3 machine, and
if so, are you actually dependent on write combining on it? The reason
I'm asking is because I would personally like to completely remove the
support for using MTRRs to create WC mappings, as it only affects a
handful of ancient CPUs: Pentium Pro, Pentium II, K6-*, and possibly
some Cyrix/Centaur part. Earlier CPUs didn't have WC, but could set WB,
WT or UC via the page tables without needing the PAT MSR, and newer CPUs
have PAT.
-hpa
