From: Rocky Hao <rocky....@rock-chips.com>
Update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.
Signed-off-by: Rocky Hao <rocky....@rock-chips.com>
Signed-off-by: Frank Wang <frank.w...@rock-chips.com>
---
arch/arm/boot/dts/rk322x.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 9a9da1f..c054e9e 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -434,6 +434,8 @@
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
+ assigned-clocks = <&cru SCLK_TSADC>;
+ assigned-clock-rates = <32768>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
pinctrl-names = "init", "default", "sleep";
--
2.0.0
