On Mon, 15 May 2017, Andy Shevchenko wrote: > Intel Cannonlake PCH has the same LPSS than Intel Kabylake. Add the new IDs > to the list of supported devices. > > Signed-off-by: Mika Westerberg <mika.westerb...@linux.intel.com> > Signed-off-by: Andy Shevchenko <andriy.shevche...@linux.intel.com> > --- > drivers/mfd/intel-lpss-pci.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+)
Applied, thanks. > diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c > index 16ffeaeb1385..ad388bb056cd 100644 > --- a/drivers/mfd/intel-lpss-pci.c > +++ b/drivers/mfd/intel-lpss-pci.c > @@ -201,6 +201,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = > { > { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info }, > + /* CNL-LP */ > + { PCI_VDEVICE(INTEL, 0x9da8), (kernel_ulong_t)&spt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info }, > + { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info }, > + { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info }, > + { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&spt_i2c_info }, > /* SPT-H */ > { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info }, > { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info }, > @@ -219,6 +232,17 @@ static const struct pci_device_id intel_lpss_pci_ids[] = > { > { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info }, > { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&spt_i2c_info }, > { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&spt_uart_info }, > + /* CNL-H */ > + { PCI_VDEVICE(INTEL, 0xa328), (kernel_ulong_t)&spt_uart_info }, > + { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info }, > + { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&spt_info }, > + { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info }, > + { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info }, > + { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info }, > + { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&spt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&spt_i2c_info }, > { } > }; > MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids); -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog