On 06/07, Dinh Nguyen wrote: > The smplsel bits for the SDMMC clock on Arria10 and Stratix10 platforms are > offset by 1 additional bit. > > Add a new macro SYSMGR_SDMMC_CTRL_SET_AS10 for usage on the Arria10 and > Stratix10 platforms. > > Signed-off-by: Dinh Nguyen <dingu...@kernel.org>
Some sort of Fixes: tag as well? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
