add ufs node for hi3660
Signed-off-by: Bu Tao <bu...@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
old mode 100644
new mode 100755
index 3983086bd67b..4ba9cec43d94
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -141,6 +141,26 @@
#size-cells = <2>;
ranges;
+ ufs: ufs@ff3b0000 {
+ compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
+ reg = <0x0 0xff3b0000 0x0 0x1000>, /* 0: HCI
standard */
+ <0x0 0xff3b1000 0x0 0x1000>; /* 1: UFS SYS
CTRL */
+ interrupt-parent = <&gic>;
+ interrupts = <0 278 4>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
+ <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
+ clock-names = "clk_ref", "clk_phy";
+ freq-table-hz = <0 0>, <0 0>;
+ resets = <&crg_rst 0x84 12>, /* offset:
0x84; bit: 12 */
+ <&crg_rst 0x84 7>; /* offset:
0x84; bit: 7 */
+ reset-names = "rst", "assert";
+ ufs-hi3660-use-rate-B;
+ ufs-hi3660-broken-fastauto;
+ ufs-hi3660-use-HS-GEAR3;
+ ufs-hi3660-broken-clk-gate-bypass;
+ status = "ok";
+ };
+
fixed_uart5: fixed_19_2M {
compatible = "fixed-clock";
#clock-cells = <0>;
--
2.11.GIT
