On Thu, Jun 08, 2017 at 02:48:23PM -0500, Janakarajan Natarajan wrote:
> In Family 17h, L3 is the last level cache as opposed to L2 in previous
> families. Avoid this name confusion and rename X86_FEATURE_PERFCTR_L2 to
> X86_FEATURE_PERFCTR_LLC to indicate the performance counter on the last
> level of cache
                . (fullstop)

> 
> Signed-off-by: Janakarajan Natarajan <janakarajan.natara...@amd.com>
> ---
>  arch/x86/events/amd/uncore.c       | 2 +-
>  arch/x86/include/asm/cpufeatures.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Borislav Petkov <b...@suse.de>

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Reply via email to