John <[EMAIL PROTECTED]> writes:

Please use a full real name for posting.

> AFAIU, even a hard real-time OS is "defenseless" against SMIs that
> kick the CPU into SMM.

There are usually chipset specific bits that can be set to disable SMMs.
See the datasheet if you can get them. Unfortunately most chipset vendors
don't give out data sheets easily.

> .globl foo
> foo:
>    push %ebx
>    push %esi
>    cpuid
>    rdtsc

At least some SMM implementations restore the old TSC value. Sad but true.
Besides RDTSC can be speculated around on some CPUs which also adds errors.

-Andi
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