This patch add Document for Rockchip Soc RK3288 LVDS,
This based on the patches from Mark yao and Heiko Stuebner.
Signed-off-by: Sandy Huang <h...@rock-chips.com>
Signed-off-by: Mark yao <mark....@rock-chips.com>
Signed-off-by: Heiko Stuebner <he...@sntech.de>
---
.../bindings/display/rockchip/rockchip-lvds.txt | 104 +++++++++++++++++++++
1 file changed, 104 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
diff --git
a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
new file mode 100644
index 0000000..bf934ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
@@ -0,0 +1,104 @@
+Rockchip RK3288 LVDS interface
+================================
+
+Required properties:
+- compatible: matching the soc type, one of
+ - "rockchip,rk3288-lvds";
+
+- reg: physical base address of the controller and length
+ of memory mapped region.
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+- clock-names: must contain "pclk_lvds"
+
+- avdd1v0-supply: regulator phandle for 1.0V analog power
+- avdd1v8-supply: regulator phandle for 1.8V analog power
+- avdd3v3-supply: regulator phandle for 3.3V analog power
+
+- rockchip,grf: phandle to the general register files syscon
+
+Optional properties
+- pinctrl-names: must contain a "lcdc" entry.
+- pinctrl-0: pin control group to be used for this controller.
+
+Required nodes:
+
+The lvds has two video ports as described by
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+Their connections are modeled using the OF graph bindings specified in
+ Documentation/devicetree/bindings/graph.txt.
+
+- video port 0 for the VOP inputs
+- video port 1 for either a panel or subsequent encoder
+
+the lvds panel described by
+ Documentation/devicetree/bindings/display/panel/simple-panel.txt
+
+- rockchip,data-mapping: should be "vesa" or "jeida",
+ This describes how the color bits are laid out in the
+ serialized LVDS signal.
+- rockchip,data-width : should be <18> or <24>;