Associate the UART nodes with the corresponding reset controller bits.

Signed-off-by: Andreas Färber <afaer...@suse.de>
---
 arch/arm64/boot/dts/realtek/rtd1295.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi 
b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
index 9f1dcd1fa8b3..e777200d84b9 100644
--- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -123,6 +123,7 @@
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clock-frequency = <27000000>;
+                       resets = <&iso_reset 8>;
                        status = "disabled";
                };
 
@@ -132,6 +133,7 @@
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clock-frequency = <432000000>;
+                       resets = <&reset2 28>;
                        status = "disabled";
                };
 
@@ -141,6 +143,7 @@
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clock-frequency = <432000000>;
+                       resets = <&reset2 27>;
                        status = "disabled";
                };
 
-- 
2.12.3

Reply via email to