Add 27 MHz oscillator and two clock controller nodes. Signed-off-by: Andreas Färber <afaer...@suse.de> --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 77063e984db9..078a11506876 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -81,6 +81,13 @@ (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>; }; + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + #clock-cells = <0>; + clock-output-names = "osc27M"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -88,6 +95,13 @@ /* Exclude up to 2 GiB of RAM */ ranges = <0x80000000 0x80000000 0x80000000>; + clkc: clock-controller@98000000 { + compatible = "realtek,rtd1295-clk"; + reg = <0x98000000 0x1000>; + clocks = <&osc27M>; + #clock-cells = <1>; + }; + reset1: reset-controller@98000000 { compatible = "realtek,rtd1295-reset"; reg = <0x98000000 0x4>; @@ -112,6 +126,13 @@ #reset-cells = <1>; }; + iso_clkc: clock-controller@98007000 { + compatible = "realtek,rtd1295-iso-clk"; + reg = <0x98007000 0x100>; + clocks = <&osc27M>; + #clock-cells = <1>; + }; + iso_irq_mux: interrupt-controller@98007000 { compatible = "realtek,rtd1295-iso-irq-mux"; reg = <0x98007000 0x100>; -- 2.12.3