Commit-ID: 0c9e498286ef9762e0ae62fc8a02b4739796970f Gitweb: http://git.kernel.org/tip/0c9e498286ef9762e0ae62fc8a02b4739796970f Author: Marc Zyngier <[email protected]> AuthorDate: Fri, 18 Aug 2017 09:39:16 +0100 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 18 Aug 2017 10:54:40 +0200
irqchip/gic: Report that effective affinity is a single target The GIC driver only targets a single CPU at a time, even if the notional affinity is wider. Let's inform the core code about this. Signed-off-by: Marc Zyngier <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: James Hogan <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Paul Burton <[email protected]> Cc: Chris Zankel <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Wei Xu <[email protected]> Cc: Max Filippov <[email protected]> Cc: Florian Fainelli <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Sebastian Hesselbarth <[email protected]> Link: http://lkml.kernel.org/r/[email protected] --- drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-gic.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index f1fd5f4..586929d 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -7,6 +7,7 @@ config ARM_GIC select IRQ_DOMAIN select IRQ_DOMAIN_HIERARCHY select MULTI_IRQ_HANDLER + select GENERIC_IRQ_EFFECTIVE_AFF_MASK config ARM_GIC_PM bool diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 1b1df4f..20dd2ba 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -344,6 +344,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, writel_relaxed(val | bit, reg); gic_unlock_irqrestore(flags); + irq_data_update_effective_affinity(d, cpumask_of(cpu)); + return IRQ_SET_MASK_OK_DONE; } #endif @@ -966,6 +968,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data, handle_fasteoi_irq, NULL, NULL); irq_set_probe(irq); + irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq))); } return 0; }
