From: Stephan Gatzka <stephan.gat...@gmail.com> Date: Tue, 22 Aug 2017 14:25:07 +0200
> When using MII/GMII/SGMII in the Altera SoC, the phy needs to be > wired through the FPGA. To ensure correct behavior, the appropriate > bit in the System Manager FPGA Interface Group register needs to be > set. > > Signed-off-by: Stephan Gatzka <stephan.gat...@gmail.com> Applied, thanks.
