4.4-stable review patch. If anyone has any objections, please let me know.
------------------
From: Kuninori Morimoto <kuninori.morimoto...@renesas.com>
commit f46a93b820eb3707faf238cd769a004e2504515f upstream.
Data left/right aligned is controlled by PDTA bit on SSICR.
But default is left-aligned. Thus 24bit sound will be very small sound
without this patch.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto...@renesas.com>
Signed-off-by: Mark Brown <broo...@kernel.org>
Signed-off-by: Thong Ho <thong.ho...@rvc.renesas.com>
Signed-off-by: Nhan Nguyen <nhan.nguyen...@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
---
sound/soc/sh/rcar/ssi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/sound/soc/sh/rcar/ssi.c
+++ b/sound/soc/sh/rcar/ssi.c
@@ -39,6 +39,7 @@
#define SCKP (1 << 13) /* Serial Bit Clock Polarity */
#define SWSP (1 << 12) /* Serial WS Polarity */
#define SDTA (1 << 10) /* Serial Data Alignment */
+#define PDTA (1 << 9) /* Parallel Data Alignment */
#define DEL (1 << 8) /* Serial Data Delay */
#define CKDV(v) (v << 4) /* Serial Clock Division Ratio
*/
#define TRMD (1 << 1) /* Transmit/Receive Mode Select
*/
@@ -286,7 +287,7 @@ static int rsnd_ssi_init(struct rsnd_mod
struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
u32 cr;
- cr = FORCE;
+ cr = FORCE | PDTA;
/*
* always use 32bit system word for easy clock calculation.
