Add AHB DMA controller nodes to Tegra20/30 DT's.

Signed-off-by: Dmitry Osipenko <[email protected]>
---
 arch/arm/boot/dts/tegra20.dtsi | 9 +++++++++
 arch/arm/boot/dts/tegra30.dtsi | 9 +++++++++
 2 files changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f1579c9a7ef4..d0c0c26427f7 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -200,6 +200,15 @@
                reg = <0x60007000 0x1000>;
        };
 
+       ahbdma: ahbdma@60008000 {
+               compatible = "nvidia,tegra20-ahbdma";
+               reg = <0x60008000 0x2000>;
+               interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&tegra_car TEGRA20_CLK_AHBDMA>;
+               resets = <&tegra_car 33>;
+               #dma-cells = <1>;
+       };
+
        apbdma: dma@6000a000 {
                compatible = "nvidia,tegra20-apbdma";
                reg = <0x6000a000 0x1200>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 13960fda7471..0800d9a8c546 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -291,6 +291,15 @@
                reg = <0x60007000 0x1000>;
        };
 
+       ahbdma: ahbdma@60008000 {
+               compatible = "nvidia,tegra20-ahbdma";
+               reg = <0x60008000 0x2000>;
+               interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&tegra_car TEGRA30_CLK_AHBDMA>;
+               resets = <&tegra_car 33>;
+               #dma-cells = <1>;
+       };
+
        apbdma: dma@6000a000 {
                compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
                reg = <0x6000a000 0x1400>;
-- 
2.14.1

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