On Wed, 4 Oct 2017 16:52:47 +0200 Peter Zijlstra <[email protected]> wrote:
> On Wed, Oct 04, 2017 at 10:43:54AM -0400, Steven Rostedt wrote: > > > > My question is not about ordering, but about coherency. Can you have > > one CPU read a variable that goes into cache, and keep using the cached > > variable every time the program asks to read it, instead of going out > > to memory. > > No, not on a coherent system. In this case. Reviewed-by: Steven Rostedt (VMware) <[email protected]> -- Steve
