2017-10-07 1:25 GMT+08:00 Radim Krčmář <[email protected]>: > Various bugs that incorrectly injected a timer interrupt. > > Going to work on kvm-unit-tests for this too.
Btw, there is a testcase which I posted before also can be used to test apic timer mode transition. https://patchwork.kernel.org/patch/9976971/ Regards, Wanpeng Li > > > Radim Krčmář (3): > KVM: x86: handle 0 write to TSC_DEADLINE MSR > KVM: x86: really disarm lapic timer when clearing TMICT > KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch > > arch/x86/kvm/lapic.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > -- > 2.14.2 >
