his patch fixes the following checkpatch.pl errors:
ERROR: space prohibited after that open parenthesis '('
ERROR: space prohibited before that ',' (ctx:WxV)
ERROR: space prohibited before that close parenthesis ')'
ERROR: space required after that ',' (ctx:VxV)
ERROR: space required before the open parenthesis '('
in rf69.c file as requested by TODO file.
Additionally some style warnings remain valid here and could be fixed by
another patch.
Signed-off-by: Marcin Ciupak <marcin.s.ciu...@gmail.com>
---
drivers/staging/pi433/rf69.c | 154 +++++++++++++++++++++----------------------
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c
index 7a79973641c9..23d609474836 100644
--- a/drivers/staging/pi433/rf69.c
+++ b/drivers/staging/pi433/rf69.c
@@ -34,7 +34,7 @@
/*-------------------------------------------------------------------------*/
#define READ_REG(x) rf69_read_reg (spi, x)
-#define WRITE_REG(x,y) rf69_write_reg(spi, x, y)
+#define WRITE_REG(x, y) rf69_write_reg(spi, x, y)
/*-------------------------------------------------------------------------*/
@@ -199,7 +199,7 @@ int rf69_set_deviation(struct spi_device *spi, u32
deviation)
// calculate register settings
f_reg = deviation * factor;
- do_div(f_reg , f_step);
+ do_div(f_reg, f_step);
msb = (f_reg&0xff00) >> 8;
lsb = (f_reg&0xff);
@@ -250,7 +250,7 @@ int rf69_set_frequency(struct spi_device *spi, u32
frequency)
// calculate reg settings
f_reg = frequency * factor;
- do_div(f_reg , f_step);
+ do_div(f_reg, f_step);
msb = (f_reg&0xff0000) >> 16;
mid = (f_reg&0xff00) >> 8;
@@ -278,9 +278,9 @@ int rf69_set_amplifier_0(struct spi_device *spi, enum
optionOnOff optionOnOff)
dev_dbg(&spi->dev, "set: amp #0");
#endif
- switch(optionOnOff) {
- case optionOn: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) |
MASK_PALEVEL_PA0) );
- case optionOff: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) &
~MASK_PALEVEL_PA0) );
+ switch (optionOnOff) {
+ case optionOn: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) |
MASK_PALEVEL_PA0));
+ case optionOff: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) &
~MASK_PALEVEL_PA0));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -293,9 +293,9 @@ int rf69_set_amplifier_1(struct spi_device *spi, enum
optionOnOff optionOnOff)
dev_dbg(&spi->dev, "set: amp #1");
#endif
- switch(optionOnOff) {
- case optionOn: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) |
MASK_PALEVEL_PA1) );
- case optionOff: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) &
~MASK_PALEVEL_PA1) );
+ switch (optionOnOff) {
+ case optionOn: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) |
MASK_PALEVEL_PA1));
+ case optionOff: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) &
~MASK_PALEVEL_PA1));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -308,9 +308,9 @@ int rf69_set_amplifier_2(struct spi_device *spi, enum
optionOnOff optionOnOff)
dev_dbg(&spi->dev, "set: amp #2");
#endif
- switch(optionOnOff) {
- case optionOn: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) |
MASK_PALEVEL_PA2) );
- case optionOff: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) &
~MASK_PALEVEL_PA2) );
+ switch (optionOnOff) {
+ case optionOn: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) |
MASK_PALEVEL_PA2));
+ case optionOff: return WRITE_REG(REG_PALEVEL, (READ_REG(REG_PALEVEL) &
~MASK_PALEVEL_PA2));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -341,7 +341,7 @@ int rf69_set_pa_ramp(struct spi_device *spi, enum paRamp
paRamp)
dev_dbg(&spi->dev, "set: pa ramp");
#endif
- switch(paRamp) {
+ switch (paRamp) {
case ramp3400: return WRITE_REG(REG_PARAMP, PARAMP_3400);
case ramp2000: return WRITE_REG(REG_PARAMP, PARAMP_2000);
case ramp1000: return WRITE_REG(REG_PARAMP, PARAMP_1000);
@@ -370,9 +370,9 @@ int rf69_set_antenna_impedance(struct spi_device *spi, enum
antennaImpedance ant
dev_dbg(&spi->dev, "set: antenna impedance");
#endif
- switch(antennaImpedance) {
- case fiftyOhm: return WRITE_REG(REG_LNA, (READ_REG(REG_LNA) &
~MASK_LNA_ZIN) );
- case twohundretOhm: return WRITE_REG(REG_LNA, (READ_REG(REG_LNA) |
MASK_LNA_ZIN) );
+ switch (antennaImpedance) {
+ case fiftyOhm: return WRITE_REG(REG_LNA, (READ_REG(REG_LNA) &
~MASK_LNA_ZIN));
+ case twohundretOhm: return WRITE_REG(REG_LNA, (READ_REG(REG_LNA) |
MASK_LNA_ZIN));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -385,14 +385,14 @@ int rf69_set_lna_gain(struct spi_device *spi, enum
lnaGain lnaGain)
dev_dbg(&spi->dev, "set: lna gain");
#endif
- switch(lnaGain) {
- case automatic: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_AUTO) );
- case max: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX) );
- case maxMinus6: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_6) );
- case maxMinus12: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_12) );
- case maxMinus24: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_24) );
- case maxMinus36: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_36) );
- case maxMinus48: return WRITE_REG(REG_LNA, ( (READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_48) );
+ switch (lnaGain) {
+ case automatic: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_AUTO));
+ case max: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX));
+ case maxMinus6: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_6));
+ case maxMinus12: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_12));
+ case maxMinus24: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_24));
+ case maxMinus36: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_36));
+ case maxMinus48: return WRITE_REG(REG_LNA, ((READ_REG(REG_LNA) &
~MASK_LNA_GAIN) & LNA_GAIN_MAX_MINUS_48));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -421,17 +421,17 @@ enum lnaGain rf69_get_lna_gain(struct spi_device *spi)
}
}
-int rf69_set_dc_cut_off_frequency_intern(struct spi_device *spi ,u8 reg, enum
dccPercent dccPercent)
+int rf69_set_dc_cut_off_frequency_intern(struct spi_device *spi, u8 reg, enum
dccPercent dccPercent)
{
switch (dccPercent) {
- case dcc16Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_16_PERCENT) );
- case dcc8Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_8_PERCENT) );
- case dcc4Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_4_PERCENT) );
- case dcc2Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_2_PERCENT) );
- case dcc1Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_1_PERCENT) );
- case dcc0_5Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_0_5_PERCENT) );
- case dcc0_25Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_0_25_PERCENT) );
- case dcc0_125Percent: return WRITE_REG(reg, ( (READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_0_125_PERCENT) );
+ case dcc16Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_16_PERCENT));
+ case dcc8Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_8_PERCENT));
+ case dcc4Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_4_PERCENT));
+ case dcc2Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_2_PERCENT));
+ case dcc1Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_1_PERCENT));
+ case dcc0_5Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_0_5_PERCENT));
+ case dcc0_25Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_0_25_PERCENT));
+ case dcc0_125Percent: return WRITE_REG(reg, ((READ_REG(reg) &
~MASK_BW_DCC_FREQ) | BW_DCC_0_125_PERCENT));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -481,7 +481,7 @@ static int rf69_set_bandwidth_intern(struct spi_device
*spi, u8 reg,
newValue = newValue & MASK_BW_DCC_FREQ;
// add new mantisse
- switch(mantisse) {
+ switch (mantisse) {
case mantisse16:
newValue = newValue | BW_MANT_16;
break;
@@ -525,9 +525,9 @@ int rf69_set_ook_threshold_type(struct spi_device *spi,
enum thresholdType thres
#endif
switch (thresholdType) {
- case fixed: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESTYPE) | OOKPEAK_THRESHTYPE_FIXED) );
- case peak: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESTYPE) | OOKPEAK_THRESHTYPE_PEAK) );
- case average: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESTYPE) | OOKPEAK_THRESHTYPE_AVERAGE) );
+ case fixed: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK) &
~MASK_OOKPEAK_THRESTYPE) | OOKPEAK_THRESHTYPE_FIXED));
+ case peak: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK) &
~MASK_OOKPEAK_THRESTYPE) | OOKPEAK_THRESHTYPE_PEAK));
+ case average: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK) &
~MASK_OOKPEAK_THRESTYPE) | OOKPEAK_THRESHTYPE_AVERAGE));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -541,14 +541,14 @@ int rf69_set_ook_threshold_step(struct spi_device *spi,
enum thresholdStep thres
#endif
switch (thresholdStep) {
- case step_0_5db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_0_5_DB) );
- case step_1_0db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_1_0_DB) );
- case step_1_5db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_1_5_DB) );
- case step_2_0db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_2_0_DB) );
- case step_3_0db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_3_0_DB) );
- case step_4_0db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_4_0_DB) );
- case step_5_0db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_5_0_DB) );
- case step_6_0db: return WRITE_REG(REG_OOKPEAK, ( (READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_6_0_DB) );
+ case step_0_5db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_0_5_DB));
+ case step_1_0db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_1_0_DB));
+ case step_1_5db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_1_5_DB));
+ case step_2_0db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_2_0_DB));
+ case step_3_0db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_3_0_DB));
+ case step_4_0db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_4_0_DB));
+ case step_5_0db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_5_0_DB));
+ case step_6_0db: return WRITE_REG(REG_OOKPEAK, ((READ_REG(REG_OOKPEAK)
& ~MASK_OOKPEAK_THRESSTEP) | OOKPEAK_THRESHSTEP_6_0_DB));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -562,14 +562,14 @@ int rf69_set_ook_threshold_dec(struct spi_device *spi,
enum thresholdDecrement t
#endif
switch (thresholdDecrement) {
- case dec_every8th: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_EVERY_8TH)
);
- case dec_every4th: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_EVERY_4TH)
);
- case dec_every2nd: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_EVERY_2ND)
);
- case dec_once: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_ONCE) );
- case dec_twice: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_TWICE) );
- case dec_4times: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_4_TIMES) );
- case dec_8times: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_8_TIMES) );
- case dec_16times: return WRITE_REG(REG_OOKPEAK, (
(READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_16_TIMES)
);
+ case dec_every8th: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) |
OOKPEAK_THRESHDEC_EVERY_8TH));
+ case dec_every4th: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) |
OOKPEAK_THRESHDEC_EVERY_4TH));
+ case dec_every2nd: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) |
OOKPEAK_THRESHDEC_EVERY_2ND));
+ case dec_once: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_ONCE));
+ case dec_twice: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_TWICE));
+ case dec_4times: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_4_TIMES));
+ case dec_8times: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) | OOKPEAK_THRESHDEC_8_TIMES));
+ case dec_16times: return WRITE_REG(REG_OOKPEAK,
((READ_REG(REG_OOKPEAK) & ~MASK_OOKPEAK_THRESDEC) |
OOKPEAK_THRESHDEC_16_TIMES));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -618,7 +618,7 @@ int rf69_set_dio_mapping(struct spi_device *spi, u8
DIONumber, u8 value)
// add new value
regValue = regValue | value << shift;
// write back
- return WRITE_REG(regaddr,regValue);
+ return WRITE_REG(regaddr, regValue);
}
bool rf69_get_flag(struct spi_device *spi, enum flag flag)
@@ -627,7 +627,7 @@ bool rf69_get_flag(struct spi_device *spi, enum flag flag)
dev_dbg(&spi->dev, "get: flag");
#endif
- switch(flag) {
+ switch (flag) {
case modeSwitchCompleted: return (READ_REG(REG_IRQFLAGS1) &
MASK_IRQFLAGS1_MODE_READY);
case readyToReceive: return (READ_REG(REG_IRQFLAGS1) &
MASK_IRQFLAGS1_RX_READY);
case readyToSend: return (READ_REG(REG_IRQFLAGS1) &
MASK_IRQFLAGS1_TX_READY);
@@ -655,7 +655,7 @@ int rf69_reset_flag(struct spi_device *spi, enum flag flag)
dev_dbg(&spi->dev, "reset: flag");
#endif
- switch(flag) {
+ switch (flag) {
case rssiExceededThreshold: return WRITE_REG(REG_IRQFLAGS1,
MASK_IRQFLAGS1_RSSI);
case syncAddressMatch: return WRITE_REG(REG_IRQFLAGS1,
MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
case fifoOverrun: return WRITE_REG(REG_IRQFLAGS2,
MASK_IRQFLAGS2_FIFO_OVERRUN);
@@ -726,9 +726,9 @@ int rf69_set_sync_enable(struct spi_device *spi, enum
optionOnOff optionOnOff)
dev_dbg(&spi->dev, "set: sync enable");
#endif
- switch(optionOnOff) {
- case optionOn: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) | MASK_SYNC_CONFIG_SYNC_ON) );
- case optionOff: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) & ~MASK_SYNC_CONFIG_SYNC_ON) );
+ switch (optionOnOff) {
+ case optionOn: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) | MASK_SYNC_CONFIG_SYNC_ON));
+ case optionOff: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) & ~MASK_SYNC_CONFIG_SYNC_ON));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -741,9 +741,9 @@ int rf69_set_fifo_fill_condition(struct spi_device *spi,
enum fifoFillCondition
dev_dbg(&spi->dev, "set: fifo fill condition");
#endif
- switch(fifoFillCondition) {
- case always: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) | MASK_SYNC_CONFIG_FIFO_FILL_CONDITION) );
- case afterSyncInterrupt: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) & ~MASK_SYNC_CONFIG_FIFO_FILL_CONDITION) );
+ switch (fifoFillCondition) {
+ case always: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) | MASK_SYNC_CONFIG_FIFO_FILL_CONDITION));
+ case afterSyncInterrupt: return WRITE_REG(REG_SYNC_CONFIG,
(READ_REG(REG_SYNC_CONFIG) & ~MASK_SYNC_CONFIG_FIFO_FILL_CONDITION));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -763,7 +763,7 @@ int rf69_set_sync_size(struct spi_device *spi, u8 syncSize)
}
// write value
- return WRITE_REG(REG_SYNC_CONFIG, (READ_REG(REG_SYNC_CONFIG) &
~MASK_SYNC_CONFIG_SYNC_SIZE) | (syncSize << 3) );
+ return WRITE_REG(REG_SYNC_CONFIG, (READ_REG(REG_SYNC_CONFIG) &
~MASK_SYNC_CONFIG_SYNC_SIZE) | (syncSize << 3));
}
int rf69_set_sync_tolerance(struct spi_device *spi, u8 syncTolerance)
@@ -808,9 +808,9 @@ int rf69_set_packet_format(struct spi_device *spi, enum
packetFormat packetForma
dev_dbg(&spi->dev, "set: packet format");
#endif
- switch(packetFormat) {
- case packetLengthVar: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) | MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE) );
- case packetLengthFix: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE) );
+ switch (packetFormat) {
+ case packetLengthVar: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) | MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE));
+ case packetLengthFix: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -823,9 +823,9 @@ int rf69_set_crc_enable(struct spi_device *spi, enum
optionOnOff optionOnOff)
dev_dbg(&spi->dev, "set: crc enable");
#endif
- switch(optionOnOff) {
- case optionOn: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) | MASK_PACKETCONFIG1_CRC_ON) );
- case optionOff: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_CRC_ON) );
+ switch (optionOnOff) {
+ case optionOn: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) | MASK_PACKETCONFIG1_CRC_ON));
+ case optionOff: return WRITE_REG(REG_PACKETCONFIG1,
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_CRC_ON));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -839,9 +839,9 @@ int rf69_set_adressFiltering(struct spi_device *spi, enum
addressFiltering addre
#endif
switch (addressFiltering) {
- case filteringOff: return WRITE_REG(REG_PACKETCONFIG1, (
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_ADDRESSFILTERING) |
PACKETCONFIG1_ADDRESSFILTERING_OFF) );
- case nodeAddress: return WRITE_REG(REG_PACKETCONFIG1, (
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_ADDRESSFILTERING) |
PACKETCONFIG1_ADDRESSFILTERING_NODE) );
- case nodeOrBroadcastAddress: return WRITE_REG(REG_PACKETCONFIG1, (
(READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_ADDRESSFILTERING) |
PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST) );
+ case filteringOff: return WRITE_REG(REG_PACKETCONFIG1,
((READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_ADDRESSFILTERING) |
PACKETCONFIG1_ADDRESSFILTERING_OFF));
+ case nodeAddress: return WRITE_REG(REG_PACKETCONFIG1,
((READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_ADDRESSFILTERING) |
PACKETCONFIG1_ADDRESSFILTERING_NODE));
+ case nodeOrBroadcastAddress: return WRITE_REG(REG_PACKETCONFIG1,
((READ_REG(REG_PACKETCONFIG1) & ~MASK_PACKETCONFIG1_ADDRESSFILTERING) |
PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -890,9 +890,9 @@ int rf69_set_tx_start_condition(struct spi_device *spi,
enum txStartCondition tx
dev_dbg(&spi->dev, "set: start condition");
#endif
- switch(txStartCondition) {
- case fifoLevel: return WRITE_REG(REG_FIFO_THRESH,
(READ_REG(REG_FIFO_THRESH) & ~MASK_FIFO_THRESH_TXSTART) );
- case fifoNotEmpty: return WRITE_REG(REG_FIFO_THRESH,
(READ_REG(REG_FIFO_THRESH) | MASK_FIFO_THRESH_TXSTART) );
+ switch (txStartCondition) {
+ case fifoLevel: return WRITE_REG(REG_FIFO_THRESH,
(READ_REG(REG_FIFO_THRESH) & ~MASK_FIFO_THRESH_TXSTART));
+ case fifoNotEmpty: return WRITE_REG(REG_FIFO_THRESH,
(READ_REG(REG_FIFO_THRESH) | MASK_FIFO_THRESH_TXSTART));
default:
dev_dbg(&spi->dev, "set: illegal input param");
return -EINVAL;
@@ -928,7 +928,7 @@ int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
dev_dbg(&spi->dev, "set: dagc");
#endif
- switch(dagc) {
+ switch (dagc) {
case normalMode: return WRITE_REG(REG_TESTDAGC,
DAGC_NORMAL);
case improve: return WRITE_REG(REG_TESTDAGC,
DAGC_IMPROVED_LOWBETA0);
case improve4LowModulationIndex: return WRITE_REG(REG_TESTDAGC,
DAGC_IMPROVED_LOWBETA1);
@@ -995,7 +995,7 @@ int rf69_write_fifo(struct spi_device *spi, u8 *buffer,
unsigned int size)
#ifdef DEBUG_FIFO_ACCESS
for (i = 0; i < size; i++)
- dev_dbg(&spi->dev, "0x%x\n",buffer[i]);
+ dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
#endif
return spi_write (spi, local_buffer, size + 1);
--
2.14.2
