From: Chao Peng <chao.p.p...@linux.intel.com>

Add a date structure to save Intel processor trace context.
It mainly include all the MSR of Intel processor trace.

Signed-off-by: Chao Peng <chao.p.p...@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
 arch/x86/include/asm/msr-index.h |  1 +
 arch/x86/include/asm/vmx.h       |  2 ++
 arch/x86/kvm/vmx.c               | 17 +++++++++++++++++
 3 files changed, 20 insertions(+)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 57433e4..96124c8 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -135,6 +135,7 @@
 #define MSR_IA32_RTIT_ADDR2_B          0x00000585
 #define MSR_IA32_RTIT_ADDR3_A          0x00000586
 #define MSR_IA32_RTIT_ADDR3_B          0x00000587
+#define MSR_IA32_RTIT_ADDR_COUNT       8
 #define MSR_IA32_RTIT_CR3_MATCH                0x00000572
 #define MSR_IA32_RTIT_OUTPUT_BASE      0x00000560
 #define MSR_IA32_RTIT_OUTPUT_MASK      0x00000561
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 80e3e22..6293803 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -240,6 +240,8 @@ enum vmcs_field {
        GUEST_PDPTR3_HIGH               = 0x00002811,
        GUEST_BNDCFGS                   = 0x00002812,
        GUEST_BNDCFGS_HIGH              = 0x00002813,
+       GUEST_IA32_RTIT_CTL             = 0x00002814,
+       GUEST_IA32_RTIT_CTL_HIGH        = 0x00002815,
        HOST_IA32_PAT                   = 0x00002c00,
        HOST_IA32_PAT_HIGH              = 0x00002c01,
        HOST_IA32_EFER                  = 0x00002c02,
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 9d1939e..5e86b5d 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -566,6 +566,21 @@ static inline int pi_test_sn(struct pi_desc *pi_desc)
                        (unsigned long *)&pi_desc->control);
 }
 
+struct pt_ctx {
+       u64 ctl;
+       u64 status;
+       u64 output_base;
+       u64 output_mask;
+       u64 cr3_match;
+       u64 addrs[MSR_IA32_RTIT_ADDR_COUNT];
+};
+
+struct pt_desc {
+       unsigned int addr_num;
+       struct pt_ctx host;
+       struct pt_ctx guest;
+};
+
 struct vcpu_vmx {
        struct kvm_vcpu       vcpu;
        unsigned long         host_rsp;
@@ -655,6 +670,8 @@ struct vcpu_vmx {
         */
        u64 msr_ia32_feature_control;
        u64 msr_ia32_feature_control_valid_bits;
+
+       struct pt_desc pt_desc;
 };
 
 enum segment_cache_field {
-- 
1.8.3.1

Reply via email to