On Tue, Nov 7, 2017 at 6:37 AM, Yixun Lan <[email protected]> wrote: > From: Xingyu Chen <[email protected]> > > Update the doc as the SAR ADC modules doesn't require "sana" clock. > > Singed-off-by: Xingyu Chen <[email protected]> > Signed-off-by: Yixun Lan <[email protected]> Acked-by: Martin Blumenstingl<[email protected]>
> --- > Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 1 - > 1 file changed, 1 deletion(-) > > diff --git > a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt > b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt > index f413e82c8b83..1e6ee3deb4fa 100644 > --- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt > +++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt > @@ -15,7 +15,6 @@ Required properties: > - "clkin" for the reference clock (typically XTAL) > - "core" for the SAR ADC core clock > optional clocks: > - - "sana" for the analog clock > - "adc_clk" for the ADC (sampling) clock > - "adc_sel" for the ADC (sampling) clock mux > - vref-supply: the regulator supply for the ADC reference voltage > -- > 2.14.1 >
