From: Vincente Tsou <vincente.t...@intel.com>

[ Upstream commit ce2e87b4ce9a6c14b3f60756b58a6b5c77e083bd ]

The upper bits of the vsync width, vsync offset and hsync width
were not parsed from the VBT. Parse these fields in this patch.

V2: Renamed lvds dvo timing structure members and code identation
fix (Jani's review comments)
V3: Corrected commit message, used "from the VBT"

Signed-off-by: Vincente Tsou <vincente.t...@intel.com>
Signed-off-by: Madhav Chauhan <madhav.chau...@intel.com>
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Link: 
http://patchwork.freedesktop.org/patch/msgid/1482430993-3265-1-git-send-email-madhav.chau...@intel.com
Signed-off-by: Sasha Levin <alexander.le...@verizon.com>
---
 drivers/gpu/drm/i915/intel_bios.c     |  8 +++++---
 drivers/gpu/drm/i915/intel_vbt_defs.h | 12 +++++++-----
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index 80c5cc5640c1..c450938c1852 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -114,16 +114,18 @@ fill_detail_timing_data(struct drm_display_mode 
*panel_fixed_mode,
        panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
                ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
        panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
-               dvo_timing->hsync_pulse_width;
+               ((dvo_timing->hsync_pulse_width_hi << 8) |
+                       dvo_timing->hsync_pulse_width_lo);
        panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
                ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
 
        panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
                dvo_timing->vactive_lo;
        panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
-               dvo_timing->vsync_off;
+               ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
        panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
-               dvo_timing->vsync_pulse_width;
+               ((dvo_timing->vsync_pulse_width_hi << 4) |
+                       dvo_timing->vsync_pulse_width_lo);
        panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
                ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
        panel_fixed_mode->clock = dvo_timing->clock * 10;
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 8886cab19f98..a92e7762f596 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -399,10 +399,12 @@ struct lvds_dvo_timing {
        u8 vblank_hi:4;
        u8 vactive_hi:4;
        u8 hsync_off_lo;
-       u8 hsync_pulse_width;
-       u8 vsync_pulse_width:4;
-       u8 vsync_off:4;
-       u8 rsvd0:6;
+       u8 hsync_pulse_width_lo;
+       u8 vsync_pulse_width_lo:4;
+       u8 vsync_off_lo:4;
+       u8 vsync_pulse_width_hi:2;
+       u8 vsync_off_hi:2;
+       u8 hsync_pulse_width_hi:2;
        u8 hsync_off_hi:2;
        u8 himage_lo;
        u8 vimage_lo;
@@ -414,7 +416,7 @@ struct lvds_dvo_timing {
        u8 digital:2;
        u8 vsync_positive:1;
        u8 hsync_positive:1;
-       u8 rsvd2:1;
+       u8 non_interlaced:1;
 } __packed;
 
 struct lvds_pnp_id {
-- 
2.11.0

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