On Thu, Nov 16, 2017 at 11:00:40AM +0800, Xie XiuQi wrote: > How about this patch?
> + /* > + * known AO MCACODs reported via MCE or CMC: > + * > + * SRAO could be signaled either via a machine check exception or > + * CMCI with the corresponding bit S 1 or 0. So we don't need to > + * check bit S for SRAO. > + */ > + MCESEV( > + AO, "Action optional: memory scrubbing error", > + SER, MASK(MCI_STATUS_OVER|MCI_UC_AR|MCACOD_SCRUBMSK, > MCI_STATUS_UC|MCACOD_SCRUB) > + ), > + MCESEV( > + AO, "Action optional: last level cache writeback error", > + SER, MASK(MCI_STATUS_OVER|MCI_UC_AR|MCACOD, > MCI_STATUS_UC|MCACOD_L3WB) > + ), > + Yes. This looks good. Reviewed-by: Tony Luck <tony.l...@intel.com> -Tony
