On Thu, 2 Nov 2017 14:49:32 +0000
Jonathan Cameron <jonathan.came...@huawei.com> wrote:

> On Wed, 1 Nov 2017 10:15:32 +1030
> Joel Stanley <j...@jms.id.au> wrote:
> 
> > On Tue, Oct 31, 2017 at 10:28 PM, Philipp Zabel
> > <philipp.za...@gmail.com> wrote:  
> > > On Tue, Oct 31, 2017 at 3:12 AM, Joel Stanley <j...@jms.id.au>
> > > wrote:    
> > >> The ASPEED SoC must deassert a reset in order to use the ADC
> > >> peripheral.
> > >>
> > >> The device tree bindings are updated to document the resets
> > >> phandle, and the example is updated to match what is expected for
> > >> both the reset and clock phandle. Note that the bindings should
> > >> have always had the reset controller, as the hardware is unusable
> > >> without it.
> > >>
> > >> Signed-off-by: Joel Stanley <j...@jms.id.au>    
> > >
> > > It is unfortunate that this has to break DT (theoretical) backwards
> > > compatibility, but given that the old bindings never worked,
> > > this is better than to pretend a required reset is optional.
> > >
> > > Reviewed-by: Philipp Zabel <philipp.za...@gmail.com>    
> > 
> > Thanks. I agree that it's unfortunate; this has been my first time
> > working on an ARM SoC and there were few things we could have done
> > better in hindsight.
> > 
> > I've got similar patches for the ASPEED hwmon pwm/tach driver, and the
> > i2c driver that I'll send out now.
> > 
> > Thanks for the review.
> > 
> > Cheers,
> > 
> > Joel  
> Hi Joel,
> 
> IIO is closed for this cycle anyway now.
> Otherwise, series looks good.
> 
> Will pick up when back with my main PC as traveling for this week and
> next.
Forgot to ask, do you want me to pick this up as a fix?
Also does it make sense to tag it for stable?

If not I can pick it up for the coming cycle. Given the code changes
are small and well isolated I'm happy to do any of the 3 options,
it really depends on whether the rest of the platform works well enough
to be worth rushing these through?

Jonathan
> 
> Thanks,
> 
> Jonathan
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