On Tue, Nov 21, 2017 at 07:59:01AM +0000, Liuwenliang (Abbott Liu) wrote:
> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> >On Sat, 18 Nov 2017 10:40:08 +0000
> >"Liuwenliang (Abbott Liu)" <liuwenli...@huawei.com> wrote:
> >> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org] wrote:
> Please don't ask people to limit to 4GB of physical space on CPU
> supporting LPAE, please don't ask people to guaranteed to have some
> memory below 4GB on CPU supporting LPAE.
I don't think that Marc is suggesting that you'd always use the 32-bit
accessors on an LPAE system, just that all the definitions should exist
regardless of configuration.
So rather than this:
> +#ifdef CONFIG_ARM_LPAE
> +#define TTBR0 __ACCESS_CP15_64(0, c2)
> +#define TTBR1 __ACCESS_CP15_64(1, c2)
> +#define PAR __ACCESS_CP15_64(0, c7)
> +#else
> +#define TTBR0 __ACCESS_CP15(c2, 0, c0, 0)
> +#define TTBR1 __ACCESS_CP15(c2, 0, c0, 1)
> +#define PAR __ACCESS_CP15(c7, 0, c4, 0)
> +#endif
... you'd have the following in cp15.h:
#define TTBR0_64 __ACCESS_CP15_64(0, c2)
#define TTBR1_64 __ACCESS_CP15_64(1, c2)
#define PAR_64 __ACCESS_CP15_64(0, c7)
#define TTBR0_32 __ACCESS_CP15(c2, 0, c0, 0)
#define TTBR1_32 __ACCESS_CP15(c2, 0, c0, 1)
#define PAR_32 __ACCESS_CP15(c7, 0, c4, 0)
... and elsewhere, where it matters, we choose which to use depending on
the kernel configuration, e.g.
void set_ttbr0(u64 val)
{
if (IS_ENABLED(CONFIG_ARM_LPAE))
write_sysreg(val, TTBR0_64);
else
write_sysreg(val, TTBR0_32);
}
Thanks,
Mark.
